Intilop delivers Nano-TOE IP Core with another record breaking Ultra-Low latency of 

76 nanoseconds & 20 G bit bandwidth for high performance networking applications. 

Intilop’s Nano-TOE loaded with many standard features delivers the lowest latency & highest 

performance, bar none!

 

Santa Clara, CA. - May. 10, 2012 -- Intilop, Inc. a pioneer and a recognized leader in providing complex 

Ultra-Low latency networking IP building blocks and systems, today announced the release of their new 

Ultra-Low latency 4 th Gen 10G Nano-TOE. This product announcement extends their leadership of more 

than 3 years in providing Ultra-Low-Latency Full TCP Offload technology and solutions. Their mature, 

network proven, and real-time deployed series of TOE's have been implemented in hundreds of networks 

worldwide.  

 

This Nano-TOE IP-Core delivers unmatched latency measured at 76 nanoseconds at 100% 10G line-rate 

at full duplex. Its Full TCP Offload is fully compliant with IEEE802.3 specifications and required RFCs 

of the TCP/IP protocol. It uses Streaming FIFO interface for data and configuration is done via industry 

standard AXI/PLB and other CPU Interfaces that allow seamless drop-in integration with Altera, Xilinx, 

Tabula FPGA devices and ASICs.  

 

The Nano-TOE IP-Core series implements many key features in pure hardware such as; IPv4, ARP, 

ICMP, VLAN, Jumbo frames up to 9K bytes plus many more options. The standard Core supports up to 

256 concurrent TCP sessions which can easily be scaled down or up depending upon available FPGA 

resources and user design requirements. In addition, protocols filtering with partial or full bypass are 

supported. Many internal or external memory interfaces e.g. DDR, QDR are also available. Many TCP 

protocol and several performance level features are fully customizable as design options, e.g. scalable size 

of Rx and Tx FIFOs, more than 256 sessions, multiple TOEs in a single FPGA or adjacent FPGAs, 

selective ACKs, Slow Start etc. Using these robust feature-sets and design options, network system 

architects are successfully designing and deploying world-class systems and applications tailored to their 

specific needs and to differentiate their solutions from others. 

 

This Nano-TOE is also pre-integrated with Intilop’s high performance 20-nanosecond EMAC as an IPCore bundle that delivers unprecedented lowest industry total latency of 96 nanoseconds for the EMAC’s 

input to TOE User_FIFO out. Moreover, the Nano-TOE is also available as pre-integrated full system 

with Intilop’s PCIe/DMA IP block. An optimized version of which can deliver a 10G total system wire to 

user-space latency close to 1 us. Finally, the Nano-TOE’s scalable architecture is designed to allow 

seamless upgrade/migration path to 40G networks and beyond.  

 

“Our Nano-TOE IP Core and solutions extend our leadership in the industry. Our existing series of IPs 

and solutions have been delivering very high performance and cost-effective systems for the most 

complex networks out there, and this translates into tremendous ROI and unmatched performance edge 

for our customers”, says Kelly Masood, Intilop’s CTO. 

Availability: Now.  

 

For Pricing and Product info, contact: info@intilop.com